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Re: Detailed Edison Module GPIO Definitions

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Yes, I do fully understand!  I started a bit before you (I will just say I started in high school with an IBM 1620 doing Fortran 2) and completed my Masters in CS over three decades ago... I did have a few EE classes back then, but that was back in the stone ages.

 

I am probably guilty of overcomplicating questions on the forum, by specifying everything I can think of.  But I have been up on several different forums over the last few years (and a moderator on three of them), and have seen far to many questions, like: my project does not work, what is wrong with it?  So I go the opposite way :lol:

 

Again I fully agree with you that there should more complete description of the device.  Currently about the only way, other than the few documents I have found information is by digging in current code and looking at what values are defined for each pin.  Example pin 182.  Some things are defined in:

/sys/class/gpio/gpio182:

 

This information is from my not overly functional Edison, using my Arduino sketch to issue commands and get responses...

Cmd: ls /sys/class/gpio/gpio182

active_low

device

direction

edge

power

subsystem

uevent

value

 

Also I don't see anywhere here that shows the valid values for these.   Example:

Direction if you cat it:

Cmd: cat /sys/class/gpio/gpio182/direction

in

 

So what value do you use for output? Probably out.

Cmd: echo out > /sys/class/gpio/gpio182/direction 

cb Read: 38

Cmd: cat /sys/class/gpio/gpio182/direction 

out

 

 

----------------------------------------------------------

Then you have to know others are defined as part of the kernel debug system:

Cmd: ls /sys/kernel/debug/gpio_debug/gpio182

available_debounce

available_direction

available_irqtype

available_opendrain

available_override_indir

available_override_inval

available_override_outdir

available_override_outval

available_pinmux

available_pullmode

available_pullstrength

available_standby_indir

available_standby_inval

available_standby_opendrain

available_standby_outdir

available_standby_outval

available_standby_pullmode

available_standby_trigger

available_value

conf_reg

current_debounce

current_direction

current_irqtype

current_opendrain

current_override_indir

current_override_inval

current_override_outdir

current_override_outval

current_pinmux

current_pullmode

current_pullstrength

current_standby_indir

current_standby_inval

current_standby_opendrain

current_standby_outdir

current_standby_outval

current_standby_pullmode

current_standby_trigger

current_value

irq_count

register_info

 

As I mentioned, earlier you can find what it thinks are valid PU values:

Cmd: cat /sys/kernel/debug/gpio_debug/gpio182/available_pullstrength

2k    20k    50k    910ohms   

 

But for example if you ask for the available mux values you see:

Cmd: cat /sys/kernel/debug/gpio_debug/gpio182/available_pinmux

mode0    mode1    mode2    mode3    mode4    mode5    mode6    mode7   

 

In the documents I see that mode0 is for GPIO, and I think mode1 is for PWM (have not tested yet), but do the other modes valid and do anything?

 

Note: all of the above is bad enough.  Then you get into how one does faster IOs to these devices through memory mapped access. This capability has only just recently been added to MRAA.  Is it defined for the whole range of pins?  I can deduce there is a Set register and a Clear register associated with each pin (Actually multiple pins per location).  When you use the Set all of the bits who are high will set those IO pins high.  Likewise when using the Clear, when you write to it all bits whose value is high will turn the cooresponding IO pin low.  But are there other capabilities?  Like a Toggle?

 

So while being a hacker at heart and with the help of Logic Analyser, I can deduce a lot of this, there should be some logical repository for such information.  Again it would be great if there was some detailed documents the show this, but maybe there should be something like a WIKI that as some of us discover this type of information we might be able to put it some place where others can find it, hopefully with someone at Intel who will help to update anything that is obviously wrong.

 

Sorry if I am slightly hijacking here.


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